Research output per year
Research output per year
Personal profile
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
Education/Academic qualification
Master of Science (Technology), Automation Engineering
Award Date: 9 Dec 2015
Bachelor of Science (Technology), Automation Engineering
Award Date: 4 Sept 2013
Fingerprint
Dive into the research topics where Panu Sjövall is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 1 Similar Profiles
-
Feasibility Study of High-Level Synthesis: Implementation of a Real-Time HEVC Intra Encoder on FPGA
Sjövall, P., 2023, Tampere: Tampere University. (Tampere University Dissertations - Tampereen yliopiston väitöskirjat; vol. 751)Research output: Book/Report › Doctoral thesis › Collection of Articles
Open Access -
FPGA-accelerated HEVC encoder for energy-efficient multi-access edge computing
Sjövall, P., Mercat, A. & Vanne, J., 8 Oct 2023, 2023 IEEE International Conference on Image Processing (ICIP). IEEE, p. 2215-2219 (Proceedings : International Conference on Image Processing).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
Open AccessFile3 Citations (Scopus)54 Downloads (Pure) -
High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications
Sjövall, P., Lemmetti, A., Vanne, J., Lahti, S. & Hämäläinen, T., 8 Mar 2022, In: ACM Transactions on Design Automation of Electronic Systems. 27, 4, 34 p.Research output: Contribution to journal › Article › Scientific › peer-review
Open AccessFile180 Downloads (Pure) -
High-level Synthesis Implementation of an Accurate HEVC Interpolation Filter on an FPGA
Sjövall, P., Rasinen, M., Lemmetti, A. & Vanne, J., Oct 2021, 2021 IEEE Nordic Circuits and Systems Conference (NorCAS). IEEE, 7 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
Open AccessFile2 Citations (Scopus)170 Downloads (Pure) -
High-level synthesis implementation of transform-exempted SATD architectures for low-power video coding
Partanen, T., Lemmetti, A., Sjövall, P. & Vanne, J., 2021, 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings. IEEE, 5 p. 9401399. (IEEE International Symposium on Circuits and Systems proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
Open AccessFile1 Citation (Scopus)147 Downloads (Pure)
Prizes
-
Best Demonstration Award
Sjövall, P. (Recipient), 2019
Prize: Award or honor granted for a specific work
-
IEEE Transactions on Circuits and Systems for Video Technology (Journal)
Sjövall, P. (Reviewer)
Jul 2024Activity: Publication peer-review and editorial work › Reviewer of Scientific Journal
-
IEEE Transactions on Consumer Electronics (Journal)
Sjövall, P. (Reviewer)
Feb 2024Activity: Publication peer-review and editorial work › Reviewer of Scientific Journal
-
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (Event)
Sjövall, P. (Reviewer)
2024Activity: Publication peer-review and editorial work › Reviewer of Conference Article
-
IEEE International Conference on Visual Communications and Image Processing (VCIP) (Event)
Sjövall, P. (Reviewer)
2024Activity: Publication peer-review and editorial work › Reviewer of Conference Article
-
IEEE Transactions on Circuits and Systems for Video Technology (Journal)
Sjövall, P. (Reviewer)
Sept 2023Activity: Publication peer-review and editorial work › Reviewer of Scientific Journal