Pekka Jääskeläinen

20062024

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  • 2019

    Programmable and Scalable Architecture for Graphics Processing Units

    de La Lama, C. S., Jääskeläinen, P., Kultala, H. & Takala, J., 23 Feb 2019, Transactions on High-Performance Embedded Architectures and Compilers V. Stenström, P., Silvano, C., Bertels, K. & Schulte, M. (eds.). p. 21-38 (Lecture Notes in Computer Science; vol. 11225).

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  • 2017

    Codesign Case Study on Transport-Triggered Architectures

    Takala, J., Jääskeläinen, P. & Pitkänen, T. O., 17 Apr 2017, Handbook of Hardware/Software Codesign. Ha, S. & Teich, J. (eds.). Springer, 35 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

  • 2016

    HW/SW Co-design Toolset for Customization of Exposed Datapath Processors

    Jääskeläinen, P., Viitanen, T., Takala, J. & Berg, H., 30 Dec 2016, Computing Platforms for Software-Defined Radio. Springer, p. 147-164 7 p.

    Research output: Chapter in Book/Report/Conference proceedingChapterScientificpeer-review

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    32 Citations (Scopus)
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