Research output per year
Research output per year
Personal profile
Language skills
Finnish (native), English (fluent)
Other supervision and instruction at TUT
Responsible teacher for Digital Design, Logic Synthesis, and High-level Synthesis courses. Supervisor of B.Sc. and M.Sc. theses.
Research interests
High-level synthesis, FPGAs, digital system design in general
Education/Academic qualification
Master of Science (Technology), Information Technology
Award Date: 4 Jun 2014
Master of Science (Technology), Electrical Engineering
Award Date: 21 Aug 2002
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Dive into the research topics where Sakari Lahti is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 1 Similar Profiles
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Leveraging Modern C++ in High-level Synthesis
Lahti, S., Rintala, M. & Hämäläinen, T. D., 2023, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 42, 4, p. 1123 - 1132Research output: Contribution to journal › Article › Scientific › peer-review
Open AccessFile10 Downloads (Pure) -
High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications
Sjövall, P., Lemmetti, A., Vanne, J., Lahti, S. & Hämäläinen, T., 8 Mar 2022, In: ACM Transactions on Design Automation of Electronic Systems. 27, 4, 34 p.Research output: Contribution to journal › Article › Scientific › peer-review
Open AccessFile73 Downloads (Pure) -
Implementation of a Nonlinear Self-Interference Canceller using High-Level Synthesis
Lahti, S., Hämäläinen, T., Pascual Campo, P., Anttila, L., Valkama, M. & Lampu, V., 21 Oct 2020, 2020 IEEE International Symposium on Circuits and Systems (ISCAS). Sevilla: IEEE, p. 1-5 5 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
Open AccessFile21 Downloads (Pure) -
Are We There Yet? A Study on the State of High-level Synthesis
Lahti, S., Sjövall, P., Vanne, J. & Hämäläinen, T. D., May 2019, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38, 5, p. 898-911Research output: Contribution to journal › Article › Scientific › peer-review
Open AccessFile17 Citations (Scopus)279 Downloads (Pure) -
Designing a clock cycle accurate application with high-level synthesis
Lahti, S., Vanne, J. & Hämäläinen, T. D., 2016, Industrial Electronics Society, IECON 2016 - 42nd Annual Conference of the IEEE. IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
Open AccessFile1 Citation (Scopus)13 Downloads (Pure)
Prizes
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Tampere Technical Society Stipend for Exemplary Master of Science Thesis
Lahti, Sakari (Recipient), 21 Aug 2002
Prize: Award or honor granted for a specific work
Activities
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Tampereen tekniikan tieteentekijät - 3T (External organisation)
Sakari Lahti (Member)
2019 → 2022Activity: Membership › Regular membership of a society or network
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Microprocessors and Microsystems (Journal)
Sakari Lahti (Reviewer)
Apr 2018Activity: Publication peer-review and editorial work › Reviewer of Scientific Journal
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Design, automation and test in Europe conference & exhibition, DATE 2015, March 9-13, 2015, Grenoble, France (Journal)
Sakari Lahti (Reviewer)
2014Activity: Publication peer-review and editorial work › Reviewer of Conference Article