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Personal profile

Language skills

Finnish (native), English (fluent)

Other supervision and instruction at TUT

Responsible teacher for Digital Design, Logic Synthesis, and High-level Synthesis courses. Supervisor of B.Sc. and M.Sc. theses.

Research interests

High-level synthesis, FPGAs, digital system design in general

Education/Academic qualification

Master of Science (Technology), Information Technology

Award Date: 4 Jun 2014

Master of Science (Technology), Electrical Engineering

Award Date: 21 Aug 2002

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