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13.5 A 0.35-to-2.6GHz multilevel outphasing transmitter with a digital interpolating phase modulator enabling up to 400MHz instantaneous bandwidth

  • Marko Kosunen
  • , Jerry Lemberg
  • , Mikko Martelius
  • , Enrico Roverato
  • , Tero Nieminen
  • , Mikko Englund
  • , Kari Stadius
  • , Lauri Anttila
  • , Jorma Pallonen
  • , Mikko Valkama
  • , Jussi Ryynänen

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    32 Citations (Scopus)
    33 Downloads (Pure)

    Abstract

    Advanced wireless radio standards set stringent requirements on the bandwidth, frequency range and reconfigurability of base-station transmitters. Recently, the outphasing concept has shown promise of wide bandwidth while taking advantage of process scaling with extensive exploitation of rail-to-rail signaling. Recent outphasing transmitter designs have often focused on power-amplifier (PA) and power-combiner implementations while omitting the phase modulator [1,2]. Moreover, previously reported transmitters with integrated digital phase modulators have only shown bandwidths up to 40MHz [3,4], although 133MHz has been demonstrated at 10GHz carrier frequency utilizing phase modulators based on conventional IQ-DACs [5]. Thus, digital-intensive outphasing transmitters capable of modulation with hundreds of MHz bandwidth at existing cellular frequency bands have not yet been published. To address the aforementioned challenge, this paper introduces a multilevel outphasing transmitter with four amplitude levels, including the first prototype implementation based on the digital interpolating phase modulator concept [6]. The transmitter is targeted for 5G picocell base stations and has been verified to operate with instantaneous bandwidth up to 400MHz. In addition, the developed phase modulator eliminates the need for complex on-chip frequency synthesizers by introducing digital carrier frequency generation, demonstrated between 0.35 and 2.6GHz, while utilizing a single 1.8GHz reference clock.

    Original languageEnglish
    Title of host publication2017 IEEE International Solid-State Circuits Conference, ISSCC 2017
    PublisherIEEE
    Pages224-225
    Number of pages2
    ISBN (Electronic)9781509037575
    DOIs
    Publication statusPublished - 2 Mar 2017
    Publication typeA4 Article in conference proceedings
    EventIEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE -
    Duration: 1 Jan 1900 → …

    Publication series

    Name
    ISSN (Electronic)2376-8606

    Conference

    ConferenceIEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE
    Period1/01/00 → …

    Publication forum classification

    • Publication forum level 2

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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