A 2 GS/s 9-bit Time-Interleaved SAR ADC with Overlapping Conversion Steps

Keyphrases

• Analog-to-digital Converter 100%
• Time-interleaved 100%
• SAR ADC 100%
• Wideband 33%
• Low Power Consumption 33%
• Digital-to-analog Converter 33%
• Time-interleaved ADC 33%
• CMOS Process 33%
• Operation Speed 33%
• Reference Dependence 33%
• Common Mode 33%
• Speed-power 33%
• Successive Approximation Register 33%
• Synchronous Counter 33%
• Counter-based 33%
• Split Capacitor Array 33%

Engineering

• Analog-to-Digital Converter 100%
• Successive Approximation 100%
• Simulation Result 16%
• Digital-to-Analog Converter 16%
• Low Power Consumption 16%
• Common Mode 16%