A 22nm Coarse-Grained Reconfigurable Array with Novel Features for Machine Learning and Digital Signal Processing

Waqar Hussain; Alexandra Geciova; Ralf Hekmann; Henry Hoffmann; Zohaib Hassan; Jari Nurmi

doi:10.1109/NorCAS66540.2025.11231197

A 22nm Coarse-Grained Reconfigurable Array with Novel Features for Machine Learning and Digital Signal Processing

Waqar Hussain
, Alexandra Geciova
, Ralf Hekmann
, Henry Hoffmann
, Zohaib Hassan
, Jari Nurmi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

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Abstract

This article presents a highly compact Coarse-Grained Reconfigurable Array (CGRA) specialized for processing Digital Signal Processing (DSP) and Machine Learning (ML) operations with an outstanding micro-architectural efficiency. The CGRA consists of high functionality Processing Elements (PEs) supported by strategically placed interconnections and bidirectional data buffers made of programmable cyclic registers. These novel features accelerate large length correlations, Fast Fourier Transforms and other DSP/ML related functions. It is a resource compact CGRA with very small dimensions, i.e., 4×4 PEs and synthesized using a 22nm CMOS technology. The design of CGRA has an AMBA interface making it an industry standard coprocessor for a system-on-chip. The novelty presented in this paper is an accepted United States patent.

Original language	English
Title of host publication	2025 IEEE Nordic Circuits and Systems Conference, NorCAS 2025
Publisher	IEEE
Number of pages	7
ISBN (Electronic)	979-8-3315-1501-0
ISBN (Print)	979-8-3315-1502-7
DOIs	https://doi.org/10.1109/NorCAS66540.2025.11231197
Publication status	Published - 2025
Publication type	A4 Article in conference proceedings
Event	IEEE Nordic Circuits and Systems Conference - Riga, Latvia Duration: 28 Oct 2025 → 29 Oct 2025

Conference

Conference	IEEE Nordic Circuits and Systems Conference
Abbreviated title	NorCAS
Country/Territory	Latvia
City	Riga
Period	28/10/25 → 29/10/25

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10.1109/NorCAS66540.2025.11231197

A 22nm Coarse-Grained Reconfigurable Array with
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title = "A 22nm Coarse-Grained Reconfigurable Array with Novel Features for Machine Learning and Digital Signal Processing",

abstract = "This article presents a highly compact Coarse-Grained Reconfigurable Array (CGRA) specialized for processing Digital Signal Processing (DSP) and Machine Learning (ML) operations with an outstanding micro-architectural efficiency. The CGRA consists of high functionality Processing Elements (PEs) supported by strategically placed interconnections and bidirectional data buffers made of programmable cyclic registers. These novel features accelerate large length correlations, Fast Fourier Transforms and other DSP/ML related functions. It is a resource compact CGRA with very small dimensions, i.e., 4×4 PEs and synthesized using a 22nm CMOS technology. The design of CGRA has an AMBA interface making it an industry standard coprocessor for a system-on-chip. The novelty presented in this paper is an accepted United States patent.",

author = "Waqar Hussain and Alexandra Geciova and Ralf Hekmann and Henry Hoffmann and Zohaib Hassan and Jari Nurmi",

year = "2025",

doi = "10.1109/NorCAS66540.2025.11231197",

language = "English",

isbn = "979-8-3315-1502-7",

booktitle = "2025 IEEE Nordic Circuits and Systems Conference, NorCAS 2025",

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note = "IEEE Nordic Circuits and Systems Conference, NorCAS ; Conference date: 28-10-2025 Through 29-10-2025",

}

Hussain, W, Geciova, A, Hekmann, R, Hoffmann, H, Hassan, Z & Nurmi, J 2025, A 22nm Coarse-Grained Reconfigurable Array with Novel Features for Machine Learning and Digital Signal Processing. in 2025 IEEE Nordic Circuits and Systems Conference, NorCAS 2025. IEEE, IEEE Nordic Circuits and Systems Conference, Riga, Latvia, 28/10/25. https://doi.org/10.1109/NorCAS66540.2025.11231197

TY - GEN

T1 - A 22nm Coarse-Grained Reconfigurable Array with Novel Features for Machine Learning and Digital Signal Processing

AU - Hussain, Waqar

AU - Geciova, Alexandra

AU - Hekmann, Ralf

AU - Hoffmann, Henry

AU - Hassan, Zohaib

AU - Nurmi, Jari

PY - 2025

Y1 - 2025

N2 - This article presents a highly compact Coarse-Grained Reconfigurable Array (CGRA) specialized for processing Digital Signal Processing (DSP) and Machine Learning (ML) operations with an outstanding micro-architectural efficiency. The CGRA consists of high functionality Processing Elements (PEs) supported by strategically placed interconnections and bidirectional data buffers made of programmable cyclic registers. These novel features accelerate large length correlations, Fast Fourier Transforms and other DSP/ML related functions. It is a resource compact CGRA with very small dimensions, i.e., 4×4 PEs and synthesized using a 22nm CMOS technology. The design of CGRA has an AMBA interface making it an industry standard coprocessor for a system-on-chip. The novelty presented in this paper is an accepted United States patent.

AB - This article presents a highly compact Coarse-Grained Reconfigurable Array (CGRA) specialized for processing Digital Signal Processing (DSP) and Machine Learning (ML) operations with an outstanding micro-architectural efficiency. The CGRA consists of high functionality Processing Elements (PEs) supported by strategically placed interconnections and bidirectional data buffers made of programmable cyclic registers. These novel features accelerate large length correlations, Fast Fourier Transforms and other DSP/ML related functions. It is a resource compact CGRA with very small dimensions, i.e., 4×4 PEs and synthesized using a 22nm CMOS technology. The design of CGRA has an AMBA interface making it an industry standard coprocessor for a system-on-chip. The novelty presented in this paper is an accepted United States patent.

U2 - 10.1109/NorCAS66540.2025.11231197

DO - 10.1109/NorCAS66540.2025.11231197

M3 - Conference contribution

SN - 979-8-3315-1502-7

BT - 2025 IEEE Nordic Circuits and Systems Conference, NorCAS 2025

PB - IEEE

T2 - IEEE Nordic Circuits and Systems Conference

Y2 - 28 October 2025 through 29 October 2025

ER -

A 22nm Coarse-Grained Reconfigurable Array with Novel Features for Machine Learning and Digital Signal Processing

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