A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS

Mikko Martelius; Kari Stadius; Jerry Lemberg; Enrico Roverato; Tero Nieminen; Yury Antonov; Lauri Anttila; Mikko Valkama; Marko Kosunen; Jussi Ryynanen

doi:10.1109/RFIC.2018.8429024

A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS

Mikko Martelius^*
, Kari Stadius
, Jerry Lemberg
, Enrico Roverato
, Tero Nieminen
, Yury Antonov
, Lauri Anttila
, Mikko Valkama
, Marko Kosunen
, Jussi Ryynanen

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

6 Citations (Scopus)

94 Downloads (Pure)

Abstract

This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.

Original language	English
Title of host publication	Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018
Publisher	IEEE
Pages	136-139
Number of pages	4
ISBN (Print)	9781538645451
DOIs	https://doi.org/10.1109/RFIC.2018.8429024
Publication status	Published - 7 Aug 2018
Publication type	A4 Article in conference proceedings
Event	IEEE Radio Frequency Integrated Circuits Symposium - Philadelphia, United States Duration: 10 Jun 2018 → 12 Jun 2018

Publication series

Name
ISSN (Electronic)	2375-0995

Conference

Conference	IEEE Radio Frequency Integrated Circuits Symposium
Country/Territory	United States
City	Philadelphia
Period	10/06/18 → 12/06/18

Keywords

CMOS integrated circuits
outphasing
power amplifiers
radio transmitters
tri-phasing

Publication forum classification

Publication forum level 1

ASJC Scopus subject areas

General Engineering

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10.1109/RFIC.2018.8429024

A 30-dBm Class-D Power Amplifier 2018
This publication is copyrighted. You may download, display and print it for Your own personal use. Commercial use is prohibited.
Accepted author manuscript, 1.21 MB

http://urn.fi/URN:NBN:fi:tuni-202002041824

Cite this

Martelius, M., Stadius, K., Lemberg, J., Roverato, E., Nieminen, T., Antonov, Y., Anttila, L., Valkama, M., Kosunen, M., & Ryynanen, J. (2018). A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS. In Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018 (pp. 136-139). Article 8429024 IEEE. https://doi.org/10.1109/RFIC.2018.8429024

@inproceedings{a083525d8d2b40549c7acb5a9a96fb87,

title = "A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS",

abstract = "This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7\% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.",

keywords = "CMOS integrated circuits, outphasing, power amplifiers, radio transmitters, tri-phasing",

author = "Mikko Martelius and Kari Stadius and Jerry Lemberg and Enrico Roverato and Tero Nieminen and Yury Antonov and Lauri Anttila and Mikko Valkama and Marko Kosunen and Jussi Ryynanen",

note = "jufoid=54731; IEEE Radio Frequency Integrated Circuits Symposium ; Conference date: 10-06-2018 Through 12-06-2018",

year = "2018",

month = aug,

day = "7",

doi = "10.1109/RFIC.2018.8429024",

language = "English",

isbn = "9781538645451",

publisher = "IEEE",

pages = "136--139",

booktitle = "Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018",

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}

Martelius, M, Stadius, K, Lemberg, J, Roverato, E, Nieminen, T, Antonov, Y, Anttila, L , Valkama, M, Kosunen, M & Ryynanen, J 2018, A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS. in Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018., 8429024, IEEE, pp. 136-139, IEEE Radio Frequency Integrated Circuits Symposium, Philadelphia, United States, 10/06/18. https://doi.org/10.1109/RFIC.2018.8429024

A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS. / Martelius, Mikko; Stadius, Kari; Lemberg, Jerry et al.
Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018. IEEE, 2018. p. 136-139 8429024.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

TY - GEN

T1 - A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS

AU - Martelius, Mikko

AU - Stadius, Kari

AU - Lemberg, Jerry

AU - Roverato, Enrico

AU - Nieminen, Tero

AU - Antonov, Yury

AU - Anttila, Lauri

AU - Valkama, Mikko

AU - Kosunen, Marko

AU - Ryynanen, Jussi

N1 - jufoid=54731

PY - 2018/8/7

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N2 - This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.

AB - This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.

KW - CMOS integrated circuits

KW - outphasing

KW - power amplifiers

KW - radio transmitters

KW - tri-phasing

U2 - 10.1109/RFIC.2018.8429024

DO - 10.1109/RFIC.2018.8429024

M3 - Conference contribution

AN - SCOPUS:85051921961

SN - 9781538645451

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EP - 139

BT - Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018

PB - IEEE

T2 - IEEE Radio Frequency Integrated Circuits Symposium

Y2 - 10 June 2018 through 12 June 2018

ER -

A 30-dBm class-d power amplifier with On/Off logic for an integrated tri-phasing transmitter in 28-nm CMOS

Abstract

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