Abstract
An asynchronous FIFO which applies fourphase handshake protocol to read or write data has been designed in Register-Transfer Level (RTL) using VHDL. The asynchronous FIFO in this paper avoids data movement in a flow-through FIFO by applying token passing scheme in its control pipelines and multiplexer in its data register bank. Two control pipelines which base on micropipeline structure are proposed and used as the control logic for the asynchronous FIFO. An asynchronous arbiter and C-element RTL structures used in the proposed asynchronous FIFO are also presented.
Original language | English |
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Title of host publication | BEC 2006 - 2006 International Baltic Electronics Conference; Proceedings of the 10th Biennial Baltic Electronics Conference |
Pages | 95-98 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 2006 |
Publication type | A4 Article in conference proceedings |
Event | BEC 2006 - 2006 International Baltic Electronics Conference; 10th Biennial Batic Electronics Conference - Tallinn, Estonia Duration: 2 Oct 2006 → 4 Oct 2006 |
Conference
Conference | BEC 2006 - 2006 International Baltic Electronics Conference; 10th Biennial Batic Electronics Conference |
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Country/Territory | Estonia |
City | Tallinn |
Period | 2/10/06 → 4/10/06 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering