AVX2-Optimized Interpolation Filters for HEVC Inter Encoding

Alexandre Mercat; Ari Lemmetti; Joose Sainio; Jarno Vanne

doi:10.1109/ISCAS46773.2023.10181449

AVX2-Optimized Interpolation Filters for HEVC Inter Encoding

Computing Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

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Abstract

High Efficiency Video Coding (HEVC) sets the stage for economic video transmission and storage, but its inherent computational complexity calls for powerful implementations. This paper addresses the principal performance bottleneck of HEVC codecs by introducing AVX2-vectorized algorithms for HEVC interpolation filters. The proposed speed-up techniques include 1) a data permutation scheme for the horizontal interpolation stage; 2) a sliding window strategy for the vertical interpolation stage; 3) optimal usage of horizontal and vertical interpolation during fractional motion estimation; and 4) a lane-based approach to double the vector lengths from 128-bit legacy vector extensions to 256bits of AVX2. Our AVX2-optimized interpolation filters were benchmarked as part of the practical Kvazaar open-source HEVC encoder. On an Intel 8-core Xeon processor, they were shown to be 9.7 and 8.5 times as fast as scalar interpolation with the Kvazaar ultrafast and veryslow presets, respectively. In both cases, changing over from scalar to vectorized interpolation increases the coding speed of Kvazaar by more than 50%, which stresses the importance of interpolation optimizations in modern video encoders.

Original language	English
Title of host publication	IEEE ISCAS 2023 - Symposium Proceedings
Subtitle of host publication	ISCAS 2023 - IEEE International Symposium on Circuits and Systems
Publisher	IEEE
ISBN (Electronic)	9781665451093
DOIs	https://doi.org/10.1109/ISCAS46773.2023.10181449
Publication status	Published - 2023
Publication type	A4 Article in conference proceedings
Event	IEEE International Symposium on Circuits and Systems - Monterey, United States Duration: 21 May 2023 → 25 Sept 2023

Publication series

Name	IEEE International Symposium on Circuits and Systems proceedings
ISSN (Print)	0271-4302
ISSN (Electronic)	2158-1525

Conference

Conference	IEEE International Symposium on Circuits and Systems
Country/Territory	United States
City	Monterey
Period	21/05/23 → 25/09/23

Funding

This work was supported in part by the AI for situational Awareness (AISA) project led by Nokia and funded by Business Finland, and the Academy of Finland (decision no. 349216).

Funders	Funder number
Academy of Finland	349216
Business Finland

Keywords

Advanced Vector Extensions 2 (AVX2)
High Efficiency Video Coding (HEVC)
interpolation filter
Kvazaar HEVC encoder
single instruction multiple data (SIMD)

Publication forum classification

Publication forum level 1

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/ISCAS46773.2023.10181449

AVX2-Optimized Interpolation Filters for HEVC Inter Encoding
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Accepted author manuscript, 579 KBLicence: Unspecified

https://urn.fi/URN:NBN:fi:tuni-202401251823Licence: Unspecified

Cite this

@inproceedings{a46ea6c4df7941f89312ad37ddc11d72,

title = "AVX2-Optimized Interpolation Filters for HEVC Inter Encoding",

abstract = "High Efficiency Video Coding (HEVC) sets the stage for economic video transmission and storage, but its inherent computational complexity calls for powerful implementations. This paper addresses the principal performance bottleneck of HEVC codecs by introducing AVX2-vectorized algorithms for HEVC interpolation filters. The proposed speed-up techniques include 1) a data permutation scheme for the horizontal interpolation stage; 2) a sliding window strategy for the vertical interpolation stage; 3) optimal usage of horizontal and vertical interpolation during fractional motion estimation; and 4) a lane-based approach to double the vector lengths from 128-bit legacy vector extensions to 256bits of AVX2. Our AVX2-optimized interpolation filters were benchmarked as part of the practical Kvazaar open-source HEVC encoder. On an Intel 8-core Xeon processor, they were shown to be 9.7 and 8.5 times as fast as scalar interpolation with the Kvazaar ultrafast and veryslow presets, respectively. In both cases, changing over from scalar to vectorized interpolation increases the coding speed of Kvazaar by more than 50\%, which stresses the importance of interpolation optimizations in modern video encoders.",

keywords = "Advanced Vector Extensions 2 (AVX2), High Efficiency Video Coding (HEVC), interpolation filter, Kvazaar HEVC encoder, single instruction multiple data (SIMD)",

author = "Alexandre Mercat and Ari Lemmetti and Joose Sainio and Jarno Vanne",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; IEEE International Symposium on Circuits and Systems ; Conference date: 21-05-2023 Through 25-09-2023",

year = "2023",

doi = "10.1109/ISCAS46773.2023.10181449",

language = "English",

series = "IEEE International Symposium on Circuits and Systems proceedings",

publisher = "IEEE",

booktitle = "IEEE ISCAS 2023 - Symposium Proceedings",

address = "United States",

}

Mercat, A, Lemmetti, A, Sainio, J & Vanne, J 2023, AVX2-Optimized Interpolation Filters for HEVC Inter Encoding. in IEEE ISCAS 2023 - Symposium Proceedings: ISCAS 2023 - IEEE International Symposium on Circuits and Systems. IEEE International Symposium on Circuits and Systems proceedings, IEEE, IEEE International Symposium on Circuits and Systems, Monterey, United States, 21/05/23. https://doi.org/10.1109/ISCAS46773.2023.10181449

AVX2-Optimized Interpolation Filters for HEVC Inter Encoding. / Mercat, Alexandre; Lemmetti, Ari; Sainio, Joose et al.
IEEE ISCAS 2023 - Symposium Proceedings: ISCAS 2023 - IEEE International Symposium on Circuits and Systems. IEEE, 2023. (IEEE International Symposium on Circuits and Systems proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

TY - GEN

T1 - AVX2-Optimized Interpolation Filters for HEVC Inter Encoding

AU - Mercat, Alexandre

AU - Lemmetti, Ari

AU - Sainio, Joose

AU - Vanne, Jarno

PY - 2023

Y1 - 2023

N2 - High Efficiency Video Coding (HEVC) sets the stage for economic video transmission and storage, but its inherent computational complexity calls for powerful implementations. This paper addresses the principal performance bottleneck of HEVC codecs by introducing AVX2-vectorized algorithms for HEVC interpolation filters. The proposed speed-up techniques include 1) a data permutation scheme for the horizontal interpolation stage; 2) a sliding window strategy for the vertical interpolation stage; 3) optimal usage of horizontal and vertical interpolation during fractional motion estimation; and 4) a lane-based approach to double the vector lengths from 128-bit legacy vector extensions to 256bits of AVX2. Our AVX2-optimized interpolation filters were benchmarked as part of the practical Kvazaar open-source HEVC encoder. On an Intel 8-core Xeon processor, they were shown to be 9.7 and 8.5 times as fast as scalar interpolation with the Kvazaar ultrafast and veryslow presets, respectively. In both cases, changing over from scalar to vectorized interpolation increases the coding speed of Kvazaar by more than 50%, which stresses the importance of interpolation optimizations in modern video encoders.

AB - High Efficiency Video Coding (HEVC) sets the stage for economic video transmission and storage, but its inherent computational complexity calls for powerful implementations. This paper addresses the principal performance bottleneck of HEVC codecs by introducing AVX2-vectorized algorithms for HEVC interpolation filters. The proposed speed-up techniques include 1) a data permutation scheme for the horizontal interpolation stage; 2) a sliding window strategy for the vertical interpolation stage; 3) optimal usage of horizontal and vertical interpolation during fractional motion estimation; and 4) a lane-based approach to double the vector lengths from 128-bit legacy vector extensions to 256bits of AVX2. Our AVX2-optimized interpolation filters were benchmarked as part of the practical Kvazaar open-source HEVC encoder. On an Intel 8-core Xeon processor, they were shown to be 9.7 and 8.5 times as fast as scalar interpolation with the Kvazaar ultrafast and veryslow presets, respectively. In both cases, changing over from scalar to vectorized interpolation increases the coding speed of Kvazaar by more than 50%, which stresses the importance of interpolation optimizations in modern video encoders.

KW - Advanced Vector Extensions 2 (AVX2)

KW - High Efficiency Video Coding (HEVC)

KW - interpolation filter

KW - Kvazaar HEVC encoder

KW - single instruction multiple data (SIMD)

U2 - 10.1109/ISCAS46773.2023.10181449

DO - 10.1109/ISCAS46773.2023.10181449

M3 - Conference contribution

AN - SCOPUS:85167696929

T3 - IEEE International Symposium on Circuits and Systems proceedings

BT - IEEE ISCAS 2023 - Symposium Proceedings

PB - IEEE

T2 - IEEE International Symposium on Circuits and Systems

Y2 - 21 May 2023 through 25 September 2023

ER -

AVX2-Optimized Interpolation Filters for HEVC Inter Encoding

Abstract

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