Benchmarking mesh and hierarchical bus networks in system-on-chip context

E. Salminen, T. Kangas, V. Lahtinen, J. Riihimäki, K. Kuusilinna, T. D. Hämäläinen

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17 Citations (Scopus)

Translated title of the contribution	Benchmarking mesh and hierarchical bus networks in system-on-chip context
Original language	English
Pages (from-to)	477-488
Journal	Journal of Systems Architecture
DOIs	https://doi.org/10.1016/j.sysarc.2006.11.006
Publication status	Published - 2007
Publication type	A1 Journal article-refereed

Publication forum classification

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title = "Benchmarking mesh and hierarchical bus networks in system-on-chip context",

author = "E. Salminen and T. Kangas and V. Lahtinen and J. Riihim{\"a}ki and K. Kuusilinna and H{\"a}m{\"a}l{\"a}inen, {T. D.}",

note = "Contribution: organisation=tkt,FACT1=1",

year = "2007",

doi = "10.1016/j.sysarc.2006.11.006",

language = "English",

pages = "477--488",

journal = "Journal of Systems Architecture",

issn = "1383-7621",

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TY - JOUR

T1 - Benchmarking mesh and hierarchical bus networks in system-on-chip context

AU - Salminen, E.

AU - Kangas, T.

AU - Lahtinen, V.

AU - Riihimäki, J.

AU - Kuusilinna, K.

AU - Hämäläinen, T. D.

N1 - Contribution: organisation=tkt,FACT1=1

PY - 2007

Y1 - 2007

U2 - 10.1016/j.sysarc.2006.11.006

DO - 10.1016/j.sysarc.2006.11.006

M3 - Article

SN - 1383-7621

SP - 477

EP - 488

JO - Journal of Systems Architecture

JF - Journal of Systems Architecture

ER -