@inproceedings{1da3a305d86440cfa99e8beb8a16598e,
title = "Class D CMOS power amplifier with on/off logic for a multilevel outphasing transmitter",
abstract = "In this paper, we present a class D power amplifier (PA) design in 28 nm CMOS for a multilevel outphasing transmitter. For increased output power, the design consists of eight unit PAs with cascoded output stages. In order to improve back-off efficiency from conventional outphasing, the PAs are switched on and off in pairs for different amplitude levels, which is challenging to implement with cascoded class D. As a solution, we introduce a new on/off switching method based on logic gates utilizing two square wave voltages to produce either a similar square wave or a constant voltage. This method enables a higher level of integration by using low-voltage digital signals for on/off control, while eliminating the timing mismatch between output transistors caused by a level shifter. The simulated peak output power of the PA is 32.4 dBm, and its peak efficiency is 34.1%.",
author = "Mikko Martelius and Kari Stadius and Jerry Lemberg and Tero Nieminen and Enrico Roverato and Marko Kosunen and Jussi Ryyn{\"a}nen and Lauri Anttila and Mikko Valkama",
year = "2016",
month = jul,
day = "29",
doi = "10.1109/ISCAS.2016.7527339",
language = "English",
publisher = "IEEE",
pages = "710--713",
booktitle = "ISCAS 2016 - IEEE International Symposium on Circuits and Systems",
address = "United States",
note = "IEEE International Symposium on Circuits and Systems ; Conference date: 01-01-1900",
}