Configurable Parallel Memory Implementation For System-on-Chip Designs

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Translated title of the contribution	Configurable Parallel Memory Implementation For System-on-Chip Designs
Original language	English
Title of host publication	System-on-Chip for Real-Time Applications
Editors	W Badawy, G.A. Jullien
Publisher	Kluwer Academic Publish ers
Pages	237-248
ISBN (Electronic)	978-1-4615-0351-4
ISBN (Print)	978-1-4613-5034-7
DOIs	https://doi.org/10.1007/978-1-4615-0351-4_22
Publication status	Published - 2003
Publication type	A3 Book chapter

Publication forum classification

@inbook{673055609c2547cc9d979148e4d6d4eb,

title = "Configurable Parallel Memory Implementation For System-on-Chip Designs",

author = "J. Vanne and E. Aho and K. Kuusilinna and T H{\"a}m{\"a}l{\"a}inen",

note = "ISBN 1-4020-7254-6 ISBN 1-4020-7254-6<br/>Contribution: organisation=tkt,FACT1=1",

year = "2003",

doi = "10.1007/978-1-4615-0351-4\_22",

language = "English",

isbn = "978-1-4613-5034-7",

pages = "237--248",

editor = "W Badawy and G.A. Jullien",

booktitle = "System-on-Chip for Real-Time Applications",

publisher = "Kluwer Academic Publish ers",

}

TY - CHAP

T1 - Configurable Parallel Memory Implementation For System-on-Chip Designs

AU - Vanne, J.

AU - Aho, E.

AU - Kuusilinna, K.

AU - Hämäläinen, T

N1 - ISBN 1-4020-7254-6 ISBN 1-4020-7254-6<br/>Contribution: organisation=tkt,FACT1=1

PY - 2003

Y1 - 2003

U2 - 10.1007/978-1-4615-0351-4_22

DO - 10.1007/978-1-4615-0351-4_22

M3 - Chapter

SN - 978-1-4613-5034-7

SP - 237

EP - 248

BT - System-on-Chip for Real-Time Applications

A2 - Badawy, W

A2 - Jullien, G.A.

PB - Kluwer Academic Publish ers

ER -