Abstract
This paper describes implementation details of a digital-intensive phase modulator architecture that does not require a frequency synthesizer to cover a wide carrier frequency range. The phase modulator operation is based on toggling the output accurately during the sample period to generate the phase-modulated signal. The toggling instants within the sample period are calculated by DSP solvers that utilize linear interpolation. The interpolation effectively multiplies the phase signal sample rate by the modulator phase resolution, which enables wider signal bandwidth and a completely digital method of defining the transmitter carrier frequency. The phase modulator concept is verified by implementing it as a part of an outphasing transmitter in 28 nm CMOS. With a constant sample rate of 1.5 GHz and without any predistortion, the transmitter achieves better than -28 dBc ACLR with 100 MHz aggregated LTE downlink signal between 0.8-2.0 GHz carrier frequency.
| Original language | English |
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| Title of host publication | 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 |
| Publisher | IEEE |
| ISBN (Electronic) | 9781538648810 |
| DOIs | |
| Publication status | Published - 26 Apr 2018 |
| Publication type | A4 Article in conference proceedings |
| Event | IEEE International Symposium on Circuits and Systems - Florence, Italy Duration: 27 May 2018 → 30 May 2018 |
Publication series
| Name | |
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| ISSN (Electronic) | 2379-447X |
Conference
| Conference | IEEE International Symposium on Circuits and Systems |
|---|---|
| Country/Territory | Italy |
| City | Florence |
| Period | 27/05/18 → 30/05/18 |
Funding
VII. ACKNOWLEDGMENT This work is supported by Nokia, the Finnish Funding Agency for Technology and Innovation, and the Academy of Finland.
Publication forum classification
- Publication forum level 1
ASJC Scopus subject areas
- Electrical and Electronic Engineering
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