Design and Implementation of Viterbi Decoder with FPGAs

M. Kivioja, J. Isoaho, L. Vänskä

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

    Translated title of the contributionDesign and Implementation of Viterbi Decoder with FPGAs
    Original languageEnglish
    Title of host publicationProceedings of 15th NORCHIP Conference, 10-11 November, 1997, Tallinn, Estonia
    Pages113-120
    Publication statusPublished - 1997
    Publication typeB3 Article in conference proceedings

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