Design of Transport Triggered Architecture Processor for Discrete Cosine Transform

J. Heikkinen, J. Sertamo, T. Rautiainen, J. Takala

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

4 Citations (Scopus)

Translated title of the contribution	Design of Transport Triggered Architecture Processor for Discrete Cosine Transform
Original language	English
Title of host publication	Proceedings of Fifteenth Annual IEEE International ASIC/SOC Conference, September 25-28, 2002, Rochester, NY, USA
Pages	87-91
Publication status	Published - 2002
Publication type	A4 Article in conference proceedings

Publication forum classification

@inproceedings{a1526bc4142943ae93782e487704e4fd,

title = "Design of Transport Triggered Architecture Processor for Discrete Cosine Transform",

author = "J. Heikkinen and J. Sertamo and T. Rautiainen and J. Takala",

note = "Contribution: organisation=tkt,FACT1=1",

year = "2002",

language = "English",

pages = "87--91",

booktitle = "Proceedings of Fifteenth Annual IEEE International ASIC/SOC Conference, September 25-28, 2002, Rochester, NY, USA",

}

Design of Transport Triggered Architecture Processor for Discrete Cosine Transform. / Heikkinen, J.; Sertamo, J.; Rautiainen, T. et al.
Proceedings of Fifteenth Annual IEEE International ASIC/SOC Conference, September 25-28, 2002, Rochester, NY, USA. 2002. p. 87-91.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Design of Transport Triggered Architecture Processor for Discrete Cosine Transform

AU - Heikkinen, J.

AU - Sertamo, J.

AU - Rautiainen, T.

AU - Takala, J.

N1 - Contribution: organisation=tkt,FACT1=1

PY - 2002

Y1 - 2002

M3 - Conference contribution

SP - 87

EP - 91

BT - Proceedings of Fifteenth Annual IEEE International ASIC/SOC Conference, September 25-28, 2002, Rochester, NY, USA

ER -