DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review

1 Citation (Scopus)

Translated title of the contribution	DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques
Original language	English
Title of host publication	Fied-Programmable Logic Architectures, Synthesis and Applications, Lecture Notes in Computer Science 849
Editors	R.W. Hartenstein, M.Z. Servit
Place of Publication	Prague, Czech Republic
Pages	318-320
Publication status	Published - 1994
Publication type	A3 Book chapter

Publication forum classification

@inbook{8b7fd6de1dca4136806de8a39769efda,

title = "DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques",

author = "J. Isoaho and A. Jantch and H. Tenhunen",

note = "Contribution: organisation=sgn,FACT1=1",

year = "1994",

language = "English",

pages = "318--320",

editor = "R.W. Hartenstein and M.Z. Servit",

booktitle = "Fied-Programmable Logic Architectures, Synthesis and Applications, Lecture Notes in Computer Science 849",

}

DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques. / Isoaho, J.; Jantch, A.; Tenhunen, H.
Fied-Programmable Logic Architectures, Synthesis and Applications, Lecture Notes in Computer Science 849. ed. / R.W. Hartenstein; M.Z. Servit. Prague, Czech Republic, 1994. p. 318-320.

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review

TY - CHAP

T1 - DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques

AU - Isoaho, J.

AU - Jantch, A.

AU - Tenhunen, H.

N1 - Contribution: organisation=sgn,FACT1=1

PY - 1994

Y1 - 1994

M3 - Chapter

SP - 318

EP - 320

BT - Fied-Programmable Logic Architectures, Synthesis and Applications, Lecture Notes in Computer Science 849

A2 - Hartenstein, R.W.

A2 - Servit, M.Z.

CY - Prague, Czech Republic

ER -