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GPU-based acceleration of symbol timing recovery

  • Scott C. Kim*
  • , William L. Plishker
  • , Shuvra S. Bhattacharyya
  • , Joseph R. Cavallaro
  • *Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    7 Citations (Scopus)

    Abstract

    This paper presents a novel implementation of graphics processing unit (GPU) based symbol timing recovery using polyphase interpolators to detect symbol timing error. Symbol timing recovery is a compute intensive procedure that detects and corrects the timing error in a coherent receiver. We provide optimal sample-time timing recovery using a maximum likelihood (ML) estimator to minimize the timing error. This is an iterative and adaptive system that relies on feedback, therefore, we present an accelerated implementation design by using a GPU for timing error detection (TED), enabling fast error detection by exploiting the 2D filter structure found in the polyphase interpolator. We present this hybrid/heterogeneous CPU and GPU architecture by computing a low complexity and low noise matched filter (MF) while simultaneously performing TED. We then compare the performance of the CPU vs. GPU based timing recovery for different interpolation rates to minimize the error and improve the detection by up to a factor of 35. We further improve the process by utilizing GPU optimization and performing block processing to improve the throughput even more, all while maintaining the lowest possible sampling rate.

    Original languageEnglish
    Title of host publicationDASIP 2012 - Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing
    Pages273-280
    Number of pages8
    Publication statusPublished - 2012
    Publication typeA4 Article in conference proceedings
    Event6th Annual Conference on Design and Architectures for Signal and Image Processing, DASIP 2012 - Karlsruhe, Germany
    Duration: 23 Oct 201225 Oct 2012

    Conference

    Conference6th Annual Conference on Design and Architectures for Signal and Image Processing, DASIP 2012
    Country/TerritoryGermany
    CityKarlsruhe
    Period23/10/1225/10/12

    Keywords

    • coherent receiver design
    • DSP accelerator
    • GPU
    • symbol timing recovery
    • synchronization

    ASJC Scopus subject areas

    • Computer Graphics and Computer-Aided Design
    • Computer Vision and Pattern Recognition
    • Hardware and Architecture
    • Signal Processing
    • Electrical and Electronic Engineering

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