Hardware-Efficient Index Mapping for Mixed Radix-2/3/4/5 FFTs

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    Abstract

    Orthogonal frequency-division multiplexing modulators and demodulators for modern communication standards require efficient implementation of the fast Fourier transform (FFT). Traditionally, radix-2 and radix-4 FFT algorithms have been used. Over the last few years, support for the non-power-of-two transform sizes, with the emphasis on radix-3 and radix-5, started to become a standard. We have created a systematic approach for designing simple digital circuits that compute array access indices for the mixed radix-2/3/4/5 FFT computations. Proposed index mapping, allows for the use of a bit rotation instead of the add/modulo and multiply operations. Index generation circuits, implementing the proposed index mapping, have hardware complexity comparable to index generation circuits for power-of-two FFTs.
    Original languageEnglish
    Title of host publicationProceedings 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation
    EditorsAndreas Gertlauer, Walid Najjar
    Pages196-201
    ISBN (Electronic)978-1-5090-3076-7
    DOIs
    Publication statusPublished - 18 Jul 2016
    Publication typeA4 Article in conference proceedings
    EventInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation -
    Duration: 1 Jan 1900 → …

    Conference

    ConferenceInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation
    Period1/01/00 → …

    Publication forum classification

    • Publication forum level 1

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