High-level parameterizable area estimation modeling for ASIC designs

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7 Citations (Scopus)

Translated title of the contribution	High-level parameterizable area estimation modeling for ASIC designs
Original language	English
Pages (from-to)	461-475
Number of pages	15
Journal	Integration: the VLSI Journal
Volume	47
Issue number	4
DOIs	https://doi.org/10.1016/j.vlsi.2014.01.002
Publication status	Published - 2014
Publication type	A1 Journal article-refereed

Publication forum classification

@article{efc9d8aa03a3479580e2e79572ea117b,

title = "High-level parameterizable area estimation modeling for ASIC designs",

author = "Ville Eerola and Jari Nurmi",

note = "Contribution: organisation=elt,FACT1=1<br/>Portfolio EDEND: 2014-08-28<br/>Publisher name: Elsevier",

year = "2014",

doi = "10.1016/j.vlsi.2014.01.002",

language = "English",

volume = "47",

pages = "461--475",

journal = "Integration: the VLSI Journal",

issn = "0167-9260",

publisher = "Elsevier B.V.",

number = "4",

}

TY - JOUR

T1 - High-level parameterizable area estimation modeling for ASIC designs

AU - Eerola, Ville

AU - Nurmi, Jari

N1 - Contribution: organisation=elt,FACT1=1<br/>Portfolio EDEND: 2014-08-28<br/>Publisher name: Elsevier

PY - 2014

Y1 - 2014

U2 - 10.1016/j.vlsi.2014.01.002

DO - 10.1016/j.vlsi.2014.01.002

M3 - Article

SN - 0167-9260

VL - 47

SP - 461

EP - 475

JO - Integration: the VLSI Journal

JF - Integration: the VLSI Journal

IS - 4

ER -