High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications

Keyphrases

• High Efficiency Video Coding 100%
• High-level Synthesis 100%
• Intra Encoder 100%
• Media Applications 100%
• Embedded Real-time 100%
• Encoder 66%
• Design Methodology 16%
• Computational Complexity 16%
• Design Process 16%
• Competitive Performance 16%
• Hardware Accelerator 16%
• PCIe 16%
• Intel 16%
• Automated Design 16%
• Coding Tools 16%
• 120-fps 16%
• Development Time 16%
• Nokia 16%
• Intra Prediction 16%
• Unseen 16%
• Kvazaar 16%
• Encoding Speed 16%
• Intel Xeon Phi 16%
• Control-oriented 16%
• Concept System 16%
• Key Enabling Technologies 16%
• Context-based Adaptive Binary Arithmetic Coding (CABAC) 16%
• Accelerator Card 16%
• Cloud Server 16%
• FPGA Acceleration 16%
• Airframe 16%
• Arria 10 16%
• Modern Media 16%
• Discrete Transforms 16%
• C Source Code 16%
• Gigabit Ethernet 16%
• Coding Performance 16%

Computer Science

• High Level Synthesis 100%
• Field Programmable Gate Arrays 100%
• Application Specific Integrated Circuit 20%
• Open Source 20%
• Computational Complexity 20%
• Arithmetic Coding 20%
• Speed-up 20%
• Source Codes 20%
• Coding Tool 20%
• Time Development 20%
• Entry Point 20%
• Intra Prediction 20%
• Connected Network 20%
• Intel Xeon Processor 20%
• Gigabit Ethernet 20%
• Coding Performance 20%
• Computer Hardware 20%