High speed DC-DC dead time architecture

Jani Järvenhaara; Hans Herzog; Sami Sipilä; Jing Tian; Igor M. Filanovsky; Nikolay T. Tchamov

doi:10.1587/elex.12.20150662

High speed DC-DC dead time architecture

Jani Järvenhaara, Hans Herzog, Sami Sipilä, Jing Tian, Igor M. Filanovsky, Nikolay T. Tchamov

Research output: Contribution to journal › Article › Scientific › peer-review

4 Citations (Scopus)

Abstract

A novel and simple solution for adjusting dead time in high speed DC-DC converters is proposed. The usual dead time adjustment of DC-DC converters through feedback control has limited speed. For the high speed converters extra circuitry and delays in the feedback should be minimized. A 240 MHz DC-DC converter with the presented dead time circuit is designed on low-voltage fast CMOS process.

Original language	English
Article number	20150662
Journal	IEICE Electronics Express
Volume	12
Issue number	19
DOIs	https://doi.org/10.1587/elex.12.20150662
Publication status	Published - 10 Oct 2015
Publication type	A1 Journal article-refereed

Keywords

DC-DC converters
cascode
dead time auto-generation

Publication forum classification

Publication forum level 1

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1587/elex.12.20150662

Cite this

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title = "High speed DC-DC dead time architecture",

abstract = "A novel and simple solution for adjusting dead time in high speed DC-DC converters is proposed. The usual dead time adjustment of DC-DC converters through feedback control has limited speed. For the high speed converters extra circuitry and delays in the feedback should be minimized. A 240 MHz DC-DC converter with the presented dead time circuit is designed on low-voltage fast CMOS process.",

keywords = "DC-DC converters, cascode, dead time auto-generation",

author = "Jani J{\"a}rvenhaara and Hans Herzog and Sami Sipil{\"a} and Jing Tian and Filanovsky, {Igor M.} and Tchamov, {Nikolay T.}",

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language = "English",

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AU - Järvenhaara, Jani

AU - Herzog, Hans

AU - Sipilä, Sami

AU - Tian, Jing

AU - Filanovsky, Igor M.

AU - Tchamov, Nikolay T.

PY - 2015/10/10

Y1 - 2015/10/10

N2 - A novel and simple solution for adjusting dead time in high speed DC-DC converters is proposed. The usual dead time adjustment of DC-DC converters through feedback control has limited speed. For the high speed converters extra circuitry and delays in the feedback should be minimized. A 240 MHz DC-DC converter with the presented dead time circuit is designed on low-voltage fast CMOS process.

AB - A novel and simple solution for adjusting dead time in high speed DC-DC converters is proposed. The usual dead time adjustment of DC-DC converters through feedback control has limited speed. For the high speed converters extra circuitry and delays in the feedback should be minimized. A 240 MHz DC-DC converter with the presented dead time circuit is designed on low-voltage fast CMOS process.

KW - DC-DC converters

KW - cascode

KW - dead time auto-generation

U2 - 10.1587/elex.12.20150662

DO - 10.1587/elex.12.20150662

M3 - Article

SN - 1349-2543

VL - 12

JO - IEICE Electronics Express

JF - IEICE Electronics Express

IS - 19

M1 - 20150662

ER -

High speed DC-DC dead time architecture

Abstract

Keywords

Publication forum classification

ASJC Scopus subject areas

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