In this work, we present a minimalistic, energy efficient implementation of instruction buffer. We use loop detection and execution trace analysis to find most commonly executed loops in already scheduled application and tailor instruction buffer size to the size of most commonly executed loop(s). In addition to our previous work, we allow buffering of loops with limited control flow (early exit from the loop or early return to the beginning of the loop). We also show how analysis of loop nests can decrease the number of times loop body is copied from memory into the buffer. Our results show that in case of favorable loop nest, we can execute all but initial loop iterations from the instruction buffer, keeping instruction memory in the deselect mode.
|Translated title of the contribution||Instruction Buffer with Limited Control Flow and Loop Nest Support|
|Title of host publication||International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-Samos, 2011, July 18-21, 2011, Samos, Greece|
|Place of Publication||Piscataway, NJ|
|Publication status||Published - 2011|
|Publication type||A4 Article in a conference publication|
|Name||International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation IC-Samos|
- Publication forum level 1