@inproceedings{5fed897f12014ae38429c9a5aaba77cb,
title = "Intra-CPU traffic estimation and implications on networks-on-chip research",
abstract = "General purpose networks-on-chip (GP-NoC) are expected to feature tens or even hundreds of computational elements with complex communications infrastructure binding them into a connected network to achieve memory synchronization. The experience accumulated over the years in network design suggests that the knowledge of the traffic nature is mandatory for successful design of a networking technology. In this paper, based on the Intel CPU family, we describe traffic estimation techniques for modern multi-core GP-CPUs, discuss the traffic modeling procedure and highlight the implications of the traffic structure for GP-NoC research. The most important observation is that the traffic at internal interfaces appears to be random for external observer and has clearly identifiable batch structure.",
keywords = "Intra-CPU communications, Networks on chip, Traffic estimation, Wireless network on chip",
author = "Dmitri Moltchanov and Arkady Kluchev and Pavel Kustarev and Karolina Borunova and Alexey Platunov",
year = "2016",
month = sep,
day = "20",
doi = "10.1007/978-3-319-46301-8_38",
language = "English",
isbn = "9783319463001",
series = "Lecture Notes in Computer Science",
publisher = "Springer International Publishing AG",
pages = "453--464",
booktitle = "Internet of Things, Smart Spaces, and Next Generation Networks and Systems - 16th International Conference, NEW2AN 2016 and 9th Conference, ruSMART 2016, Proceedings",
address = "Switzerland",
note = "International Conference on Next Generation Wired/Wireless Advanced Networks and Systems ; Conference date: 01-01-1900",
}