Live Demonstration: 4K100p HEVC Intra Encoder

Vili Viitamäki, Panu Sjövall, Jarno Vanne, Timo Hämäläinen, Ari Kulmala

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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    Abstract

    This paper describes a demonstration setup for real-time 4K HEVC intra coding. The system is built on Kvazaar open-source HEVC encoder partitioned between 22-core Xeon processor and two Arria 10 FPGAs. The demonstrator supports 1) live streaming of up to three 4K30p videos; or 2) offline video streaming up to 4K100p format. Live feeds are shot by three cameras whereas offline video is accessed from a local hard drive. In both cases, encoded bit stream is sent over a wired connection and played back by laptop(s). The demonstrated HEVC coding speed is over three times as fast as that of a pure software solution.
    Original languageEnglish
    Title of host publicationProceedings of 2018 IEEE International Symposium on Circuits and Systems
    PublisherIEEE
    Pages1-1
    ISBN (Electronic)978-1-5386-4881-0
    DOIs
    Publication statusPublished - 2018
    Publication typeA4 Article in a conference publication
    EventIEEE International Symposium on Circuits and Systems - Florence, Italy
    Duration: 27 May 201830 May 2018

    Publication series

    Name
    ISSN (Electronic)2379-447X

    Conference

    ConferenceIEEE International Symposium on Circuits and Systems
    Country/TerritoryItaly
    CityFlorence
    Period27/05/1830/05/18

    Publication forum classification

    • Publication forum level 1

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