Abstract
Image processing applications typically involve data-oriented kernels with limited control divergence. In order to efficiently exploit the data level parallelism, image processors include SIMD instructions and other parallel computation resources. Generic processors that can be purchased off-the-shelf
are adequate for most of the use scenarios of image processing.However, especially with embedded mobile devices, they might not be optimal for the algorithm, the environment, or the energy budget at hand. Such cases call for programmable customized architectures with just enough hardware resources to ensure the high priority applications reach their real time goals with minimal
overheads. In order to maintain high engineer productivity, implementing
image algorithms for customized processors should be as easy as with standard processors. This is emphasized at the processor codesign time; because the program is used to drive the processor design space exploration towards an optimized architecture, assembly programming is not feasible due to the required porting effort whenever the architecture is modified.In this paper we propose an image processor customization flow that exploits the domain-specific Halide language as an input to a processor co-design environment. In addition to efficiently exploiting standard resources in the customized processors, the flow provides an easy way to invoke special instructions from
Halide programs. We validate the performance benefits of custom operations using example filters described with the Halide language.
are adequate for most of the use scenarios of image processing.However, especially with embedded mobile devices, they might not be optimal for the algorithm, the environment, or the energy budget at hand. Such cases call for programmable customized architectures with just enough hardware resources to ensure the high priority applications reach their real time goals with minimal
overheads. In order to maintain high engineer productivity, implementing
image algorithms for customized processors should be as easy as with standard processors. This is emphasized at the processor codesign time; because the program is used to drive the processor design space exploration towards an optimized architecture, assembly programming is not feasible due to the required porting effort whenever the architecture is modified.In this paper we propose an image processor customization flow that exploits the domain-specific Halide language as an input to a processor co-design environment. In addition to efficiently exploiting standard resources in the customized processors, the flow provides an easy way to invoke special instructions from
Halide programs. We validate the performance benefits of custom operations using example filters described with the Halide language.
| Original language | English |
|---|---|
| Title of host publication | IEEE Global Conference on Signal and Information Processing (IEEE GlobalSIP 2015) |
| Publisher | IEEE |
| Pages | 629-633 |
| Number of pages | 5 |
| ISBN (Electronic) | 978-1-4799-7590-7 |
| DOIs | |
| Publication status | Published - 14 Dec 2015 |
| Publication type | A4 Article in conference proceedings |
| Event | IEEE Global Conference on Signal and Information Processing - Duration: 1 Jan 1900 → … |
Conference
| Conference | IEEE Global Conference on Signal and Information Processing |
|---|---|
| Period | 1/01/00 → … |
Publication forum classification
- Publication forum level 1