Reliability of n-bit nanotechnology adder

I. Hänninen, J. Takala

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

    4 Citations (Scopus)
    Translated title of the contributionReliability of n-bit nanotechnology adder
    Original languageEnglish
    Title of host publicationProceedings of IEEE Computer Society Annual Symposium on VLSI, 7-9 April 2008, Montpellier, France
    EditorsL. Torres
    Pages34-39
    DOIs
    Publication statusPublished - 2008
    Publication typeA4 Article in a conference publication

    Publication forum classification

    • No publication forum level

    Cite this