Reliability of n-bit nanotechnology adder

I. Hänninen, J. Takala

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

4 Citations (Scopus)

Translated title of the contribution	Reliability of n-bit nanotechnology adder
Original language	English
Title of host publication	Proceedings of IEEE Computer Society Annual Symposium on VLSI, 7-9 April 2008, Montpellier, France
Editors	L. Torres
Pages	34-39
DOIs	https://doi.org/10.1109/ISVLSI.2008.6
Publication status	Published - 2008
Publication type	A4 Article in conference proceedings

Publication forum classification

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title = "Reliability of n-bit nanotechnology adder",

author = "I. H{\"a}nninen and J. Takala",

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year = "2008",

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editor = "L. Torres",

booktitle = "Proceedings of IEEE Computer Society Annual Symposium on VLSI, 7-9 April 2008, Montpellier, France",

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AU - Hänninen, I.

AU - Takala, J.

N1 - Contribution: organisation=tkt,FACT1=1

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U2 - 10.1109/ISVLSI.2008.6

DO - 10.1109/ISVLSI.2008.6

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EP - 39

BT - Proceedings of IEEE Computer Society Annual Symposium on VLSI, 7-9 April 2008, Montpellier, France

A2 - Torres, L.

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