Towards Efficient Code Generation for Exposed Datapath Architectures

Kanishkan Vadivel, Roel Jordans, Sander Stujik, Henk Corporaal, Pekka Jääskeläinen, Heikki Kultala

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

1 Citation (Scopus)
5 Downloads (Pure)


Coarse-grained reconfigurable architectures and other exposed datapath architectures such as transport-triggered architectures come with a high energy efficiency promise for accelerating data oriented workloads. Their main drawback results from the push of complexity from the architecture to the programmer; compiler techniques that allow starting from a higher-level programming language and generate code efficiently to such architectures robustly is still an open research area. In this article we survey the known main sources of challenges and outline a generic processor architecture template that covers the most common architecture variations along with a proposal for a common code generation framework for such challenging architectures.

Original languageEnglish
Title of host publicationProceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019
EditorsSander Stuijk
Number of pages4
ISBN (Electronic)9781450367622
Publication statusPublished - 27 May 2019
Publication typeA4 Article in conference proceedings
EventInternational Workshop on Software and Compilers for Embedded Systems - St. Goar, Germany
Duration: 27 May 201928 May 2019


ConferenceInternational Workshop on Software and Compilers for Embedded Systems
CitySt. Goar


  • CGRA
  • code generation
  • energy efficiency
  • reconfigurable architectures
  • scheduling
  • TTA

Publication forum classification

  • Publication forum level 1

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software


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