Towards Efficient Code Generation for Exposed Datapath Architectures

Kanishkan Vadivel; Roel Jordans; Sander Stujik; Henk Corporaal; Pekka Jääskeläinen; Heikki Kultala

doi:10.1145/3323439.3323990

Towards Efficient Code Generation for Exposed Datapath Architectures

Kanishkan Vadivel, Roel Jordans, Sander Stujik, Henk Corporaal, Pekka Jääskeläinen, Heikki Kultala

Computing Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

1 Citation (Scopus)

5 Downloads (Pure)

Abstract

Coarse-grained reconfigurable architectures and other exposed datapath architectures such as transport-triggered architectures come with a high energy efficiency promise for accelerating data oriented workloads. Their main drawback results from the push of complexity from the architecture to the programmer; compiler techniques that allow starting from a higher-level programming language and generate code efficiently to such architectures robustly is still an open research area. In this article we survey the known main sources of challenges and outline a generic processor architecture template that covers the most common architecture variations along with a proposal for a common code generation framework for such challenging architectures.

Original language	English
Title of host publication	Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019
Editors	Sander Stuijk
Publisher	ACM
Pages	86-89
Number of pages	4
ISBN (Electronic)	9781450367622
DOIs	https://doi.org/10.1145/3323439.3323990
Publication status	Published - 27 May 2019
Publication type	A4 Article in conference proceedings
Event	International Workshop on Software and Compilers for Embedded Systems - St. Goar, Germany Duration: 27 May 2019 → 28 May 2019

Conference

Conference	International Workshop on Software and Compilers for Embedded Systems
Country/Territory	Germany
City	St. Goar
Period	27/05/19 → 28/05/19

Keywords

CGRA
code generation
energy efficiency
reconfigurable architectures
scheduling
TTA

Publication forum classification

Publication forum level 1

ASJC Scopus subject areas

Hardware and Architecture
Software

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1145/3323439.3323990

Towards Efficient Code Generation 2019
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Accepted author manuscript, 5.07 MB

http://urn.fi/URN:NBN:fi:tuni-202010297701

Cite this

@inproceedings{d68bd335080b49e8904dbc315d47902a,

title = "Towards Efficient Code Generation for Exposed Datapath Architectures",

abstract = "Coarse-grained reconfigurable architectures and other exposed datapath architectures such as transport-triggered architectures come with a high energy efficiency promise for accelerating data oriented workloads. Their main drawback results from the push of complexity from the architecture to the programmer; compiler techniques that allow starting from a higher-level programming language and generate code efficiently to such architectures robustly is still an open research area. In this article we survey the known main sources of challenges and outline a generic processor architecture template that covers the most common architecture variations along with a proposal for a common code generation framework for such challenging architectures.",

keywords = "CGRA, code generation, energy efficiency, reconfigurable architectures, scheduling, TTA",

author = "Kanishkan Vadivel and Roel Jordans and Sander Stujik and Henk Corporaal and Pekka J{\"a}{\"a}skel{\"a}inen and Heikki Kultala",

year = "2019",

month = may,

day = "27",

doi = "10.1145/3323439.3323990",

language = "English",

pages = "86--89",

editor = "Sander Stuijk",

booktitle = "Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019",

publisher = "ACM",

note = "International Workshop on Software and Compilers for Embedded Systems ; Conference date: 27-05-2019 Through 28-05-2019",

}

Vadivel, K, Jordans, R, Stujik, S, Corporaal, H, Jääskeläinen, P & Kultala, H 2019, Towards Efficient Code Generation for Exposed Datapath Architectures. in S Stuijk (ed.), Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019. ACM, pp. 86-89, International Workshop on Software and Compilers for Embedded Systems, St. Goar, Germany, 27/05/19. https://doi.org/10.1145/3323439.3323990

Towards Efficient Code Generation for Exposed Datapath Architectures. / Vadivel, Kanishkan; Jordans, Roel; Stujik, Sander et al.
Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019. ed. / Sander Stuijk. ACM, 2019. p. 86-89.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review

TY - GEN

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AU - Jordans, Roel

AU - Stujik, Sander

AU - Corporaal, Henk

AU - Jääskeläinen, Pekka

AU - Kultala, Heikki

PY - 2019/5/27

Y1 - 2019/5/27

N2 - Coarse-grained reconfigurable architectures and other exposed datapath architectures such as transport-triggered architectures come with a high energy efficiency promise for accelerating data oriented workloads. Their main drawback results from the push of complexity from the architecture to the programmer; compiler techniques that allow starting from a higher-level programming language and generate code efficiently to such architectures robustly is still an open research area. In this article we survey the known main sources of challenges and outline a generic processor architecture template that covers the most common architecture variations along with a proposal for a common code generation framework for such challenging architectures.

AB - Coarse-grained reconfigurable architectures and other exposed datapath architectures such as transport-triggered architectures come with a high energy efficiency promise for accelerating data oriented workloads. Their main drawback results from the push of complexity from the architecture to the programmer; compiler techniques that allow starting from a higher-level programming language and generate code efficiently to such architectures robustly is still an open research area. In this article we survey the known main sources of challenges and outline a generic processor architecture template that covers the most common architecture variations along with a proposal for a common code generation framework for such challenging architectures.

KW - CGRA

KW - code generation

KW - energy efficiency

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KW - scheduling

KW - TTA

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DO - 10.1145/3323439.3323990

M3 - Conference contribution

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BT - Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019

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PB - ACM

T2 - International Workshop on Software and Compilers for Embedded Systems

Y2 - 27 May 2019 through 28 May 2019

ER -

Towards Efficient Code Generation for Exposed Datapath Architectures

Abstract

Conference

Keywords

Publication forum classification

ASJC Scopus subject areas

UN SDGs

Access to Document

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Cite this