TTA-SIMD Soft Core Processors

Kati Tervo, Samawat Malik, Topi Leppänen, Pekka Jääskeläinen

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

123 Downloads (Pure)


Soft processors are an important tool in the Field Programmable Gate Array (FPGA) designer's toolkit, and their Single Instruction Multiple Data (SIMD) organizations are an efficient means to utilize the parallelism of FPGAs. However, the state-of-the-art SIMD processors are hindered by the additional logic complexity resulting from dynamic features. By minimizing such constructs, it is possible to design soft processors that are efficient but still flexible enough to operate within an application domain. To this end, we propose a family of instruction set programmable multi-issue wide SIMD soft cores. The template is based on a highly static Transport Triggered Architecture (TTA) and a design time customizable shuffle unit to minimize inefficient dynamic features while remaining compiler programmable. The cores are evaluated on the PYNQ-Z1 board against the ARM A9 hard processor system with NEON vector extensions. The proposed cores reach up to 2.4x performance improvement over the ARM, can fit up to 1024 bit wide SIMD units onto the relatively small FPGA, while still operating at above 100 MHz. The scalability of TTA enables state of the art vector widths. The multicore scalability of the template is preliminarily tested with a 14-core design on a XCZU9EG FPGA customized for real-time convolutional neural net inference.

Original languageEnglish
Title of host publicationProceedings - 30th International Conference on Field-Programmable Logic and Applications, FPL 2020
EditorsNele Mentens, Leonel Sousa, Pedro Trancoso, Miquel Pericas, Ioannis Sourdis
Number of pages6
ISBN (Electronic)9781728199023
ISBN (Print)978-1-7281-9903-0
Publication statusPublished - 2020
Publication typeA4 Article in conference proceedings
EventInternational Conference on Field-Programmable Logic and Applications - Virtual, Gothenburg, Sweden
Duration: 31 Aug 20204 Sept 2020

Publication series

NameInternational Conference on Field Programmable Logic and Applications
ISSN (Print)1946-147X
ISSN (Electronic)1946-1488


ConferenceInternational Conference on Field-Programmable Logic and Applications
CityVirtual, Gothenburg


  • Field-Programmable Gate Array (FPGA)
  • Single Instruction Multiple Data (SIMD)
  • Transport-Triggered Architecture (TTA)

Publication forum classification

  • Publication forum level 1

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture
  • Software
  • Logic


Dive into the research topics of 'TTA-SIMD Soft Core Processors'. Together they form a unique fingerprint.

Cite this