Unified OpenCL Integration Methodology for FPGA Designs

Topi Leppänen, Panagiotis Mousouliotis, Georgios Keramidas, Joonas Multanen, Pekka Jääskeläinen

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

4 Citations (Scopus)
70 Downloads (Pure)


OpenCL is a widely adopted open standard for general purpose programming of diverse heterogeneous parallel platforms that can harness various device types such as CPUs, DSPs, GPUs, FPGAs and hardware accelerators. It is an extensive and explicit low level API serving well as a platform portability layer. However, using OpenCL for diverse heterogeneous programming in multi-vendor platforms is not practical due to device vendors each providing their own OpenCL implementations which do not interoperate efficiently, leading to inefficient execution coordination and collaborative execution between various device types from different vendors. To this end, this paper proposes a vendor-independent open source method for integration of custom FPGA components to a common OpenCL platform. The method relies on a streamlined memory-mapped hardware control interface implemented by the integrated components. The required OpenCL driver integration is then automatically provided, enabling easy inclusion of different types of FPGA accelerators to the control of a single OpenCL runtime. The ease of integration and portability is demonstrated by integrating two hardware devices in two different FPGA devices. The resource overhead of the hardware interface is shown to be negligible and the clock frequency overheads small enough to not pose efficiency challenges.
Original languageEnglish
Title of host publication2021 IEEE Nordic Circuits and Systems Conference (NorCAS)
Number of pages7
ISBN (Electronic)978-1-6654-0712-0
ISBN (Print)978-1-6654-0713-7
Publication statusPublished - 2021
Publication typeA4 Article in conference proceedings
EventIEEE Nordic Circuits and Systems Conference -
Duration: 26 Oct 202127 Oct 2021


ConferenceIEEE Nordic Circuits and Systems Conference

Publication forum classification

  • Publication forum level 1


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