Abstract
This paper describes analysis of nonlinear effects in a MOS transistor operating in moderate inversion and saturation. The dependence of the drain current on the gate-source and drain-source voltages is described using a modified version of the ``reconciliation'' model developed by Y. Tsividis. In the new model, the current components, which correspond to the terms depending exponentially on normalized gate-source or drain-source modulating sinusoidal voltages, are presented using modified Bessel functions. This approach allows one to find the first, second, and third harmonics of the drain current caused by the gate-source or drain-source voltage sinusoidal modulation and find also the intermodulation terms produced by these two modulating voltages. The results are applied to set the requirements to the gate-source and drain-source bias voltages in design of low-distortion and/or low-voltage amplifiers. It is shown that the realization of the stage with the zero value of third-order harmonic requires extremely tight tolerances for the threshold voltage. The suppression of intermodulation terms requires increased drain-source voltage. These recommendations are confirmed by simulations.
| Original language | English |
|---|---|
| Pages (from-to) | 1897-1907 |
| Number of pages | 10 |
| Journal | IEEE Transactions on Circuits and Systems |
| Volume | 66 |
| Issue number | 5 |
| Early online date | 4 Jan 2019 |
| DOIs | |
| Publication status | Published - 5 May 2019 |
| Publication type | A1 Journal article-refereed |
Funding
Manuscript received May 4, 2018; revised October 25, 2018 and November 26, 2018; accepted November 30, 2018. Date of publication January 4, 2019; date of current version April 15, 2019. This work was supported in part by the NSERC, Canada, in part by the Portuguese Foundation for Science and Technology under Project PESTOEEEI/UI0066/2015 and foRESTER Project PCIF/SSI/0102/2017, and in part by the Academy of Finland. This paper was recommended by Associate Editor E. Blokhina. (Corresponding author: Igor M. Filanovsky.) I. M. Filanovsky is with the University of Alberta, Edmonton, AB T6G 2R3, Canada (e-mail: [email protected]).
Keywords
- MOS transistor model
Publication forum classification
- Publication forum level 2
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