Utilization of a VHDL-based ASIC-Realizable Digital Filter Architecture Library in DSP System Design

V. Savela, P. Järvinen, A. Nummela, J. Keskinen, J. Nurmi

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientific

    Translated title of the contributionUtilization of a VHDL-based ASIC-Realizable Digital Filter Architecture Library in DSP System Design
    Original languageEnglish
    Title of host publicationProc. VHDL International User's Forum VIUF- Fall'94, Washington, DC, USA, October
    Publication statusPublished - 1994
    Publication typeB3 Non-refereed article in conference proceedings

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