Verification of an IP Interface Prototype Design through Simulation and Emulation

V. Lahtinen; K. Kuusilinna; T. Hämäläinen; J. Saarinen

Verification of an IP Interface Prototype Design through Simulation and Emulation

V. Lahtinen, K. Kuusilinna, T. Hämäläinen, J. Saarinen

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review

Translated title of the contribution	Verification of an IP Interface Prototype Design through Simulation and Emulation
Original language	English
Title of host publication	Advances in Signal Processing and Computer Technologies. Electrical and Computer Engineering Series. A Series of Reference Books and Textbooks.
Editors	G. Antoniou
Place of Publication	Kreikka
Publisher	WSES Press
Pages	511-516
Publication status	Published - 2001
Publication type	A3 Book chapter

Publication forum classification

No publication forum level

Access to Document

http://www.worldses.org

Cite this

Lahtinen, V., Kuusilinna, K., Hämäläinen, T., & Saarinen, J. (2001). Verification of an IP Interface Prototype Design through Simulation and Emulation. In G. Antoniou (Ed.), Advances in Signal Processing and Computer Technologies. Electrical and Computer Engineering Series. A Series of Reference Books and Textbooks. (pp. 511-516). WSES Press. http://www.worldses.org

@inbook{527762fe83ec482198594501f9b74d74,

title = "Verification of an IP Interface Prototype Design through Simulation and Emulation",

author = "V. Lahtinen and K. Kuusilinna and T. H{\"a}m{\"a}l{\"a}inen and J. Saarinen",

note = "ISBN: 960-8052-37-8<br/>Contribution: organisation=tkt,FACT1=1",

year = "2001",

language = "English",

pages = "511--516",

editor = "G. Antoniou",

booktitle = "Advances in Signal Processing and Computer Technologies. Electrical and Computer Engineering Series. A Series of Reference Books and Textbooks.",

publisher = "WSES Press",

}

Lahtinen, V, Kuusilinna, K, Hämäläinen, T & Saarinen, J 2001, Verification of an IP Interface Prototype Design through Simulation and Emulation. in G Antoniou (ed.), Advances in Signal Processing and Computer Technologies. Electrical and Computer Engineering Series. A Series of Reference Books and Textbooks.. WSES Press, Kreikka, pp. 511-516. <http://www.worldses.org>

Verification of an IP Interface Prototype Design through Simulation and Emulation. / Lahtinen, V.; Kuusilinna, K.; Hämäläinen, T. et al.
Advances in Signal Processing and Computer Technologies. Electrical and Computer Engineering Series. A Series of Reference Books and Textbooks.. ed. / G. Antoniou. Kreikka: WSES Press, 2001. p. 511-516.

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review

TY - CHAP

T1 - Verification of an IP Interface Prototype Design through Simulation and Emulation

AU - Lahtinen, V.

AU - Kuusilinna, K.

AU - Hämäläinen, T.

AU - Saarinen, J.

N1 - ISBN: 960-8052-37-8<br/>Contribution: organisation=tkt,FACT1=1

PY - 2001

Y1 - 2001

M3 - Chapter

SP - 511

EP - 516

BT - Advances in Signal Processing and Computer Technologies. Electrical and Computer Engineering Series. A Series of Reference Books and Textbooks.

A2 - Antoniou, G.

PB - WSES Press

CY - Kreikka

ER -