A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth

Jerry Lemberg; Mikko Martelius; Enrico Roverato; Yury Antonov; Tero Nieminen; Kari Stadius; Lauri Anttila; Mikko Valkama; Marko Kosunen; Jussi Ryynanen

doi:10.1109/JSSC.2019.2902753

A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth

Jerry Lemberg
, Mikko Martelius
, Enrico Roverato^*
, Yury Antonov
, Tero Nieminen
, Kari Stadius
, Lauri Anttila
, Mikko Valkama
, Marko Kosunen
, Jussi Ryynanen

^*Tämän työn vastaava kirjoittaja

Tutkimustuotos: Artikkeli › Tieteellinen › vertaisarvioitu

34 Sitaatiot (Scopus)

13 Lataukset (Pure)

Abstrakti

We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non-contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5% error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6% PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.

Alkuperäiskieli	Englanti
Sivut	1517-1527
Sivumäärä	11
Julkaisu	IEEE Journal of Solid-State Circuits
Vuosikerta	54
Numero	6
DOI - pysyväislinkit	https://doi.org/10.1109/JSSC.2019.2902753
Tila	Julkaistu - 1 kesäk. 2019
OKM-julkaisutyyppi	A1 Alkuperäisartikkeli tieteellisessä aikakauslehdessä

Rahoitus

Manuscript received July 12, 2018; revised December 11, 2018 and February 18, 2019; accepted February 19, 2019. Date of publication March 22, 2019; date of current version May 24, 2019. This paper was approved by Associate Editor Alyosha Molnar. This work was supported in part by Nokia, in part by the Finnish Funding Agency for Technology and Innovation (Tekes), in part by the European Union’s Horizon 2020 Research and Innovation Programme under the Marie Sklodowska-Curie under Grant 704947, and in part by the Academy of Finland. (Corresponding author: Enrico Roverato.) J. Lemberg was with the Department of Electronics and Nanoengineering, Aalto University, 02150 Espoo, Finland. He is now with LG Electronics, 20520 Turku, Finland.

Julkaisufoorumi-taso

Jufo-taso 3

!!ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/JSSC.2019.2902753

A 1.5–1.9-GHz All-Digital Tri-Phasing 2019
This publication is copyrighted. You may download, display and print it for Your own personal use. Commercial use is prohibited.
Final published version, 4,49 MB

http://urn.fi/URN:NBN:fi:tuni-202011167968

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Lemberg, J., Martelius, M., Roverato, E., Antonov, Y., Nieminen, T., Stadius, K., Anttila, L., Valkama, M., Kosunen, M., & Ryynanen, J. (2019). A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth. IEEE Journal of Solid-State Circuits, 54(6), 1517-1527. https://doi.org/10.1109/JSSC.2019.2902753

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title = "A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth",

abstract = "We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non-contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5\% error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6\% PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.",

keywords = "All-digital transmitter, class-D power amplifier (PA), digital interpolating phase modulator (DIPM), multilevel outphasing, tri-phasing",

author = "Jerry Lemberg and Mikko Martelius and Enrico Roverato and Yury Antonov and Tero Nieminen and Kari Stadius and Lauri Anttila and Mikko Valkama and Marko Kosunen and Jussi Ryynanen",

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Lemberg, J, Martelius, M, Roverato, E, Antonov, Y, Nieminen, T, Stadius, K, Anttila, L , Valkama, M, Kosunen, M & Ryynanen, J 2019, 'A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth', IEEE Journal of Solid-State Circuits, Vuosikerta 54, Nro 6, Sivut 1517-1527. https://doi.org/10.1109/JSSC.2019.2902753

TY - JOUR

T1 - A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth

AU - Lemberg, Jerry

AU - Martelius, Mikko

AU - Roverato, Enrico

AU - Antonov, Yury

AU - Nieminen, Tero

AU - Stadius, Kari

AU - Anttila, Lauri

AU - Valkama, Mikko

AU - Kosunen, Marko

AU - Ryynanen, Jussi

PY - 2019/6/1

Y1 - 2019/6/1

N2 - We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non-contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5% error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6% PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.

AB - We present a prototype RF transmitter with an integrated multilevel class-D power amplifier (PA), implemented in 28-nm CMOS. The transmitter utilizes tri-phasing modulation, which combines three constant-envelope phase-modulated signals with coarse amplitude modulation in the PA. This new architecture achieves the back-off efficiency of multilevel outphasing, without linearity-degrading discontinuities in the RF output waveform. Because all signal processing is performed in the time domain up to the PA, the entire system is implemented with digital circuits and structures, thus also enabling the use of synthesis and place-and-route CAD tools for the RF front end. The effectiveness of the digital tri-phasing concept is supported by extensive measurement results. Improved wideband performance is validated through the transmission of orthogonal frequency-division multiplexing (OFDM) bandwidths up to 100 MHz. Enhanced reconfigurability is demonstrated with non-contiguous carrier aggregation and digital carrier generation between 1.5 and 1.9 GHz without a frequency synthesizer. For a 20-MHz 256-QAM OFDM signal at 3.5% error vector magnitude (EVM), the transmitter achieves 22.6-dBm output power and 14.6% PA efficiency. Thanks to the high linearity enabled by tri-phasing, no digital predistortion is needed for the PA.

KW - All-digital transmitter

KW - class-D power amplifier (PA)

KW - digital interpolating phase modulator (DIPM)

KW - multilevel outphasing

KW - tri-phasing

U2 - 10.1109/JSSC.2019.2902753

DO - 10.1109/JSSC.2019.2902753

M3 - Article

AN - SCOPUS:85066461891

SN - 0018-9200

VL - 54

SP - 1517

EP - 1527

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 6

ER -

A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth

Abstrakti

Rahoitus

Julkaisufoorumi-taso

!!ASJC Scopus subject areas

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