An 18–28 GHz dual-mode down-converter IC for 5G applications

Saeed Naghavi, Kaisa Ryynänen, Mahwish Zahra, Aleksi Korsman, Kari Stadius, Marko Kosunen, Vishnu Unnikrishnan, Lauri Anttila, Mikko Valkama, Jussi Ryynänen

Tutkimustuotos: ArtikkeliScientificvertaisarvioitu

8 Lataukset (Pure)

Abstrakti

Emerging spectrum trends require a higher integration of 5G New Radio Frequency Range 1 (FR1) and Frequency Range 2 (FR2) bands to enhance the availability of spectrum and spectrum-sharing opportunities. To enable the reception of both FR1 and FR2 bands in a seamless hardware entity, we propose combining homodyne and heterodyne architectures. This necessitates the incorporation of a down-converter module that transfers the incoming signals from FR2 bands down to FR1, ensuring compatibility with an FR1 direct-conversion receiver (DCR) for the final signal reception. The primary focus of this paper is the design and implementation of the required integrated down-converter. The module includes an integrated balun, a low-noise amplifier (LNA) with a bypass mode, a dual-mode mixer, and an intermediate frequency (IF) amplifier. The introduced bypass mode helps to further elevate the linearity performance compared to the nominal mode. The bypass mode is designed for joint communication and sensing operation to avoid the compression of the receiver. This work also incorporates a local oscillator (LO) signal distribution network with phase tuning elements using a mixed-signal approach. The circuit is implemented in a 22-nm CMOS process, and the active die area is 0.6 mm 2 . The measurements demonstrate that the implemented chip can efficiently perform the required frequency conversion over a wide frequency range of 18–28 GHz. Conversion gain of 4.5–7.5 dB, noise figure of 15–19.7 dB, 1 dB compression point (IP1dB) of − 16 to − 10 dBm, and input third-order intercept point (IIP3) of − 5 to 0 dBm are achieved. The measured IP1 dB and IIP3 for the bypass mode are +0.5 to +4.5 dBm and +8.5 to +10 dBm, respectively.

AlkuperäiskieliEnglanti
JulkaisuAnalog Integrated Circuits and Signal Processing
DOI - pysyväislinkit
TilaE-pub ahead of print - 21 tammik. 2024
OKM-julkaisutyyppiA1 Alkuperäisartikkeli tieteellisessä aikakauslehdessä

Julkaisufoorumi-taso

  • Jufo-taso 1

!!ASJC Scopus subject areas

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films

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