Challenges in integration of resonant interband tunnel devices with CMOS

Stephen Sudirgo, Branislav Curanovic, Sean L. Rommel, Karl D. Hirschman, Santosh K. Kurinec, Niu Jin, Anthony T. Rice, Paul R. Berger, Phillip E. Thompson

Tutkimustuotos: KonferenssiartikkeliScientificvertaisarvioitu

3 Sitaatiot (Scopus)

Abstrakti

The fabrication of SiGe Resonant Interband Tunnel Devices (RITD) using CMOS compatible processes requires ability to form RITD structures selectively on source/drain regions. Various approaches were investigated and RITDs have been realized in lithographically defined openings in oxide on Si wafers. Patterned growth RITD on p+ Si exhibited a peak-to-valley current ratio (PVCR) of 3.0 and peak current density (JP) of 188 A/cm2 whereas RITD on p+ implanted regions resulted in a PVCR of 2.5 with JP of 278 A/cm2. Blanket growth RITD on p+ implanted substrate yielded a superior PCVR of 3.3 and JP of 332 A/cm2. The observed effects of patterned growth and implanted substrate on the RITD device performance are critical challenges addressed in this study for RITD-CMOS integration.

AlkuperäiskieliEnglanti
OtsikkoProceedings of the 15th Biennial University/Government/Industry Microelectronics Symposium
KustantajaIEEE
Sivut275-278
Sivumäärä4
ISBN (painettu)0-7803-7972-1
DOI - pysyväislinkit
TilaJulkaistu - 2003
Julkaistu ulkoisestiKyllä
OKM-julkaisutyyppiA4 Artikkeli konferenssijulkaisussa
Tapahtuma15th Biennial University/Government/Industry Microelectronics Symposium - Boise, ID, Yhdysvallat
Kesto: 30 kesäk. 20032 heinäk. 2003

Julkaisusarja

NimiBiennial University/Government/Industry Microelectronics Symposium - Proceedings
KustantajaInstitute of Electrical and Electronics Engineers Inc.
ISSN (painettu)0749-6877

Conference

Conference15th Biennial University/Government/Industry Microelectronics Symposium
Maa/AlueYhdysvallat
KaupunkiBoise, ID
Ajanjakso30/06/032/07/03

!!ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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