Abstrakti
Transport triggered architecture processors may have function unit input registers, which allow operands to be written to function units earlier than the clock cycle where the operation begins execution. An operand used in consecutive operations may be written only once, saving register file accesses and internal bus traffic. This optimization is called operand sharing. In this paper, the effectiveness of operand sharing is analyzed from the perspective of improving the energy-efficiency of the processor. On average of 12.0 % and at the best case of 32.4 % of register file reads could be eliminated, resulting in the best case power savings of 5.3% and energy savings of 8.8 %. In one of the 14 measured cases, operand sharing allowed a register file read port to be removed without performance penalty.
Alkuperäiskieli | Englanti |
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Otsikko | 2015 18th CSI International Symposium on Computer Architecture and Digital Systems (CADS) |
Sivumäärä | 6 |
DOI - pysyväislinkit | |
Tila | Julkaistu - 2016 |
OKM-julkaisutyyppi | A4 Artikkeli konferenssijulkaisussa |
Tapahtuma | International Symposium on Computer Architecture and Digital Systems - Kesto: 1 tammik. 1900 → … |
Conference
Conference | International Symposium on Computer Architecture and Digital Systems |
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Ajanjakso | 1/01/00 → … |
Julkaisufoorumi-taso
- Jufo-taso 1