Kvazaar 4K HEVC Intra Encoder on FPGA Accelerated Airframe Server

    Tutkimustuotos: Conference contributionScientificvertaisarvioitu

    4 Sitaatiot (Scopus)
    95 Lataukset (Pure)

    Abstrakti

    This paper presents a real-time Kvazaar HEVC intra encoder for 4K Ultra HD video streaming. The encoder is implemented on Nokia AirFrame Cloud Server featuring a 2.4 GHz dual 14-core Intel Xeon processor and Arria 10 PCI Express FPGA accelerator card. In our HW/SW partitioning scheme, the data-intensive Kvazaar coding tools including intra prediction, DCT, inverse DCT, quantization, and inverse quantization are offloaded to Arria 10 whereas CABAC coding and other control-intensive coding tools are executed on Xeon processors. Arria 10 has enough capacity for up to two instances of our intra coding accelerator. The results show that the proposed system is able to encode 4K video at 30 fps with a single intra coding accelerator and at 40 fps with two accelerators. The respective speed-up factors are 1.6 and 2.1 over the pure Xeon implementation. To the best of our knowledge, this is the first work dealing with HEVC intra encoder partitioned between CPU and FPGA. It achieves the same coding speed as HEVC intra encoders on ASIC and it is at least 4 times faster than existing HEVC intra encoders on FPGA.
    AlkuperäiskieliEnglanti
    OtsikkoProceedings of 2017 IEEE International Workshop on Signal Processing Systems
    KustantajaIEEE
    Sivut1-6
    ISBN (elektroninen)978-1-5386-0446-5
    DOI - pysyväislinkit
    TilaJulkaistu - 2017
    OKM-julkaisutyyppiA4 Artikkeli konferenssijulkaisussa
    TapahtumaIEEE International Workshop on Signal Processing Systems -
    Kesto: 1 tammikuuta 1900 → …

    Julkaisusarja

    Nimi
    ISSN (elektroninen)2374-7390

    Conference

    ConferenceIEEE International Workshop on Signal Processing Systems
    Ajanjakso1/01/00 → …

    Julkaisufoorumi-taso

    • Jufo-taso 1

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