Multiplierless Reconfigurable Processing Element for Mixed Radix-2/3/4/5 FFTs

Fahad Qureshi, Muazam Ali, Jarmo Takala

    Tutkimustuotos: KonferenssiartikkeliTieteellinenvertaisarvioitu

    4 Sitaatiot (Scopus)

    Abstrakti

    This paper presents area-efficient building blocks for computing fast Fourier transform (FFT): multiplierless processing elements to be used for computing of radix-3 and radix-5 butterflies and reconfigurable processing element supporting mixed radix-2/3/4/5 FFT algorithms. The proposed processing elements are based on Wingorad Fourier transform algorithm. However, multiplication is performed by constant multiplier instead of a general complex-valued multiplier. The proposed process elements have potential use in both pipelined and memory based FFT architectures, where the non-power-of-two sizes are required. The results show that the proposed multiplierless processing elements reduce the significant hardware cost in terms of adders.
    AlkuperäiskieliEnglanti
    Otsikko2017 IEEE International Workshop on Signal Processing Systems (SiPS)
    KustantajaIEEE
    ISBN (elektroninen)978-1-5386-0446-5
    DOI - pysyväislinkit
    TilaJulkaistu - 2017
    OKM-julkaisutyyppiA4 Artikkeli konferenssijulkaisussa
    TapahtumaIEEE International Workshop on Signal Processing Systems -
    Kesto: 1 tammik. 1900 → …

    Julkaisusarja

    Nimi
    ISSN (elektroninen)2374-7390

    Conference

    ConferenceIEEE International Workshop on Signal Processing Systems
    Ajanjakso1/01/00 → …

    Julkaisufoorumi-taso

    • Jufo-taso 1

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