TY - GEN
T1 - Towards Coarse-Grained Reconfigurable Approximate Computing with CGRAgen
AU - Damsgaard, Hans
AU - Ometov, Aleksandr
AU - Nurmi, Jari
PY - 2023/9/4
Y1 - 2023/9/4
N2 - Modern Edge Computing devices execute applications that must meet strict latency requirements as per traditional standardization activities. Achieving the needed performance implies a need for efficiency in all aspects, thus, flexible solutions are needed. In this Ph.D. project, we address this issue for error-tolerant applications by using Coarse-Grained Reconfigurable Arrays (CGRAs) enriched with Approximate Computing (AxC) features. To do so, we aim to develop a CGRA architecture modeling, mapping, and hardware generation flow complete with AxC hardware primitives and significance analysis.
AB - Modern Edge Computing devices execute applications that must meet strict latency requirements as per traditional standardization activities. Achieving the needed performance implies a need for efficiency in all aspects, thus, flexible solutions are needed. In this Ph.D. project, we address this issue for error-tolerant applications by using Coarse-Grained Reconfigurable Arrays (CGRAs) enriched with Approximate Computing (AxC) features. To do so, we aim to develop a CGRA architecture modeling, mapping, and hardware generation flow complete with AxC hardware primitives and significance analysis.
KW - approximate computing
KW - coarse-grained reconfigurable array
KW - computation offloading
KW - mapping
U2 - 10.1109/FPL60245.2023.00067
DO - 10.1109/FPL60245.2023.00067
M3 - Conference contribution
SN - 979-8-3503-4152-2
T3 - International Conference on Field Programmable Logic and Applications
SP - 361
EP - 362
BT - International Conference on Field Programmable Logic and Applications (FPL)
PB - IEEE
CY - Gothenburg, Sweden
T2 - International Conference on Field-Programmable Logic and Applications
Y2 - 4 September 2023 through 8 September 2023
ER -